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NXP Semiconductors /LPC800 /USART0 /INTSTAT

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Interpret as INTSTAT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXRDY)RXRDY 0RESERVED 0 (TXRDY)TXRDY 0RESERVED 0 (DELTACTS)DELTACTS 0 (TXDISINT)TXDISINT 0RESERVED 0 (OVERRUNINT)OVERRUNINT 0RESERVED 0 (DELTARXBRK)DELTARXBRK 0 (START)START 0 (FRAMERRINT)FRAMERRINT 0 (PARITYERRINT)PARITYERRINT 0 (RXNOISEINT)RXNOISEINT 0RESERVED

Description

Interrupt status register. Reflects interrupts that are currently enabled.

Fields

RXRDY

Receiver Ready flag.
RESERVED

Reserved. Read value is undefined, only zero should be written.
TXRDY

Transmitter Ready flag.
RESERVED

Reserved. Read value is undefined, only zero should be written.
DELTACTS

This bit is set when a change in the state of the CTS input is detected.
TXDISINT

Transmitter Disabled Interrupt flag.
RESERVED

Reserved. Read value is undefined, only zero should be written.
OVERRUNINT

Overrun Error interrupt flag.
RESERVED

Reserved. Read value is undefined, only zero should be written.
DELTARXBRK

This bit is set when a change in the state of receiver break detection occurs.
START

This bit is set when a start is detected on the receiver input.
FRAMERRINT

Framing Error interrupt flag.
PARITYERRINT

Parity Error interrupt flag.
RXNOISEINT

Received Noise interrupt flag.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data